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AUDITORY AI SOC PLATFORM

SOMMERS1

A 55nm Full SoC development platform built around the auditory AI core.

In developmentDiscuss development
INTEGRATED ARCHITECTURE

Auditory processing, analog and power functions.

Auditory AI Core
ADC / DACPMIC

Integrated SoC development architecture

CORE TECHNOLOGY

The foundation for auditory analysis and processing.

CHANNELS2,001

Feature Extraction

Multi-channel auditory feature extraction

UPDATE INTERVAL2ms

Feature Update

Feature-update interval

FREQUENCY RESOLUTION~2Hz-class

Frequency Analysis

Frequency-analysis resolution

Development specifications. The 2ms figure is a feature-update interval, not end-to-end system latency.

Explore the core technologyDevelopment and validation
APPLICATIONS

Development guided by device requirements.

Development focuses on hearing-aid SoCs, with potential applications in smart glasses, hearables and machine hearing under exploration.

Contact us for the current development stage and application requirements.

Explore applications
DISCUSS YOUR APPLICATION

Design how your next device hears.

Tell us about your device and its auditory-processing requirements.

Discuss technology and development